Timing diagram and Machine Cycle of 8085 microprocessor

Hello friends, today we are going to see .. what is timing diagram, machine cycle and how they are performing operations.

Important terms to performing Timing Operations

The 8085 microprocessor is performing different instructions. Each instruction has two parts: operation code, known as opcode, and operand. The opcode is a command such as ADD, SUB, MOV and operand is an object to be operated on, such as MVI A, 32H : Load byte 32H in the Accumulator. To execute an instruction, the 8085 needs to perform various operations such as Memory Read/Write, I/O Read/Write. To perform such operations we need to understand the step by step working of any instruction and its execution. For this we need different terms to understand first, these are as follows..

Timing diagram

Timing Diagram shows the behavior of the object(s) in a given period of time. It represents the execution time taken by each instruction in a graphical format. The execution time is represented in the forms of T-states.

T-state

One sub-division of an operation performed in one clock cycle is called a T-state. T1, T2, T3, T4  are called states.

Machine cycle

A group of state come together to perform one operation is called machine cycle.

Instruction cycle

The total time for fetching and executing an instruction is called instruction cycle. An instruction cycle consists of one or more machine cycle.

Example of Timing diagram, t-state, machine cycle and instruction cycle

Machine cycles of 8085

8085 has 5 basic machine cycles operations

• opcode Fetch cycle
• Memory read cycle
• Memory write cycle
• I/O Read cycle
• I/O Write cycle

Opcode Fetch Machine Cycle

The first operation in any instruction is Opcode Fetch. In 1-byte instruction the machine code is an opcode only. The microprocessor needs to get (fetch) the machine code from the memory register. The microprocessor stored the data in registers before executing any instruction.

Timing Transfer of Bytes from Memory to MPU

 figure shows the timing of how a data byte is transferred from memory to the MPU. It shows five group of signals with respect to the system clock, To fetch the byte, the MPU performs the following steps:

• Step 1: During T1 state program counter places the 16-bit high order memory address on the address bus, low order date on the data bus and ALE signal goes high for address latching. Similarly, the status signal IO/M goes low, indicating that this is a memory related operation.
• Step 2: At T2 state, The control unit sends the control signal RD = 0 to enable the memory chip to read opcode from memory.
• Step 3: During T3 state, when the memory is enabled, the instruction byte is placed from the memory location to the data bus. After that RD = 1 goes high, data bus goes to high impedance.
• Step 4: At T4, the microprocessor performs internal operations and the machine code or the byte is decoded by the instruction decoder to know whether further states i.e. T5 or T6 states are required or not. if they are not required then microprocessor performs next operation i.e. the contents of the accumulator are copied into register c for showing the results.

Memory Read Machine Cycle

The memory read machine cycle, we need to examine the execution of a 2-byte and 3-byte instruction because in a 1-byte instruction, the machine code is an opcode and operation is always an opcode fetch. The memory read machine cycle requires M1 and M2 cycles.

• Step 1: The first machine cycle M1 is opcode fetch cycle (see above).
• Step 2: After completion of the opcode fetch cycle, the microprocessor turns to M2 cycle, this is for actual memory read. Here the microprocessor places the higher byte of address on the address bus and increment the program counter by one for next address. 
• For memory read operation IO/M=0, S0 = 0 and S1 = 1. (The status signal S1 and S2 can be used to differentiate between different machine cycles). ALE goes low. RD signal becomes active and enables the memory chip.
• Step 3: At T3, activates the data bus as an input bus and microprocessor reads and stores the data byte in the accumulator.

Timing execution of the memory read operation

Memory Write Machine Cycle

In the instruction cycle, the first operation is always Opcode fetch. This cycle can be of four to six T-state duration.  The Memory Read and Write cycles will not be asserted simultaneously - the microprocessor can not read and write at the same time. The steps are as follows.

• Step 1: The first machine cycle M1 is opcode fetch cycle (see above).
• Step 2: After completion of the opcode fetch cycle, the microprocessor turns to M2 cycle, this is for actual memory read/write  Here the microprocessor places the higher byte of address on the address bus and increment the program counter by one for next address. IO/M=0, S0=1 and S1=0  because it is memory write operation (the bits of status signal changed). ALE goes low and the contents of the accumulator on the data bus AD7 -AD0 and active the write signal.
• Step 3: In the last T3 state, the content of the data bus are placed in the memory location. When the data is reached, the WR signal goes high, it indicates the bus goes to high impedance state.

Memory write machine cycle 

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